SiliconStudy
An AI tutor that walks electrical-engineering students through RISC-V SoC textbooks like Harris & Harris, with concept diagrams, worked examples, and viva-style questions for each chapter.
Undergraduate and graduate EE students studying SoC and RISC-V design
- Chapter-by-chapter explainer that turns textbook sections into short videos, diagrams, and flashcards
- Worked problem walkthroughs for pipelining, caches, and memory-mapped I/O topics
- Viva-style oral exam practice with AI follow-up questions when answers are shaky
- Lab-project advisor that helps students debug Verilog/SystemVerilog snippets from homework
The Harris RISC-V SoC textbook is currently topping Hacker News (64 points, 25 comments), signaling strong student and educator demand for structured learning support around this exact curriculum.
Harris & Harris RISC-V SoC textbook exists and is published by Elsevier (1st ed.), confirming real curriculum interest, but the specific Hacker News '64 points · 25 comments' post could not be verified in search; RISC-V adoption is growing but the audience is a niche of EE students.RISC-V System-on-Chip Design - 1st Edition | Elsevier Shop ↗
Already crowded: AITEE (agentic EE tutor paper, May 2025), AskSia EE tutor, and general-purpose ChatGPT Study Mode all serve this exact audience, leaving little differentiated whitespace.Paper page - AITEE -- Agentic Tutor for Electrical Engineering ↗Personal Electrical Engineering Tutor Online for University Students ↗
Students are price-sensitive and already pay $6-20/mo for ChatGPT Plus / Gemini student tiers that cover generic tutoring; a $20+/mo single-textbook companion is a tough sell vs. a free ChatGPT prompt.ChatGPT Plus Student Discount 2026: Current Status ↗
RISC-V is a multi-decade industry shift with stable university curricula (Harris, Patterson & Hennessy-style textbooks last 10+ years), so a textbook-aligned tutor has long shelf life.RISC-V System-on-Chip Design - Google Books ↗
LLM+RAG over a single textbook is straightforward to prototype; diagram generation and accurate worked examples for RTL/SoC concepts are the main engineering challenges but tractable.Paper page - AITEE -- Agentic Tutor for Electrical Engineering ↗